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High-Level Synthesis: from Algorithm to Digital Circuit [Paperback]

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  • Category: Books (Technology &Amp; Engineering)
  • ISBN-10:  9048179238
  • ISBN-10:  9048179238
  • ISBN-13:  9789048179237
  • ISBN-13:  9789048179237
  • Publisher:  Springer
  • Publisher:  Springer
  • Pages:  297
  • Pages:  297
  • Binding:  Paperback
  • Binding:  Paperback
  • Pub Date:  01-Mar-2010
  • Pub Date:  01-Mar-2010
  • SKU:  9048179238-11-SPRI
  • SKU:  9048179238-11-SPRI
  • Item ID: 100969410
  • List Price: $109.99
  • Seller: ShopSpell
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  • Delivery by: Dec 01 to Dec 03
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This book presents an excellent collection of contributions addressing different aspects of high-level synthesis from both industry and academia. It includes an overview of available EDA tool solutions and their applicability to design problems.

Preface: Giovanni di Michelli Chapter 1: User Needs. P. Urard, J. Yi, A.Gouraud Chapter 2: HLS: A Retrospective. Rajesh Gupta, Forrest Brewer Chapter 3: Catapult(R) Synthesis. Thomas Bollaert Chapter 4: Algorithmic Synthesis using PICO. S. Aditya, V. Kathail Chapter 5: High-Level SystemC Synthesis with Forte's Cynthesizer. Mike Meredith Chapter 6: AutoPilotTM: A Platform-Based ESL Synthesis System. Jason Cong, et al. Chapter 7: 'All-in-C' SoC Synthesis and Verification with CyberWorkBench. Kazutoshi Wakabayashi, Benjamin Schafer Chapter 8: Bluespec: A General-Purpose Approach to High Level Synthesis based on Atomic Transactions. Rishiyur Nikhil Chapter 9: GAUT: A High-Level Synthesis Tool for DSP Applications. Philippe Coussy, et al. Chapter 10: User Guided High Level Synthesis. Ivan Auge Chapter 11: Synthesis of DSP Algorithms from Infinite Precision Specifications. Christos-Savvas Bouganis, George Constantinides Chapter 12: High-Level Synthesis of loops using the Polyhedral Model. Steven Derien, et al. Chapter 13: Operation Scheduling: Algorithms and Applications. Gang Wang, Wenrui Gong, Ryan Kastner Chapter 14: Exploiting Bit-Level Design Techniques in Behavioural Synthesis. Maria Molina, Rafael Ruiz-Sautua, Jose M. Mendias, Roman Hermida Chapter 15: High-Level Synthesis Algorithms for Power and Temperature Minimization. Li Shang, Robert P. Dick, Niraj K. Jha

The successful usage of Hardware Description Languages like VHDL and Verilog in design flows is mainly due to the availability of efficient synthesis methods and tools that enable the translation of RTL designs into optimized gate-level implementations. Many expect that the same approach could be effectively adapted at higher levels of abstrlă+

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