- Offers a comprehensive overview of NAND flash memories, with insights into NAND history, technology, challenges, evolutions, and perspectives
- Describes new program disturb issues, data retention, power consumption, and possible solutions for the challenges of 3D NAND flash memory
- Written by an authority in NAND flash memory technology, with over 25 years’ experience
Foreword xi
Preface xv
Acknowledgments xvii
About the Author xix
1 Introduction 1
1.1 Background, 1
1.2 Overview, 8
References, 10
2 Principle of NAND Flash Memory 17
2.1 NAND Flash Device and Architecture, 17
2.1.1 NAND Flash Memory Cell Architecture, 17
2.1.2 Peripheral Device, 19
2.2 Cell Operation, 21
2.2.1 Read Operation, 21
2.2.2 Program and Erase Operation, 21
2.2.3 Program and Erase Dynamics, 28
2.2.4 Program Boosting Operation, 31
2.3 Multilevel Cell (MLC), 34
2.3.1 Cell Vt Setting, 34
References, 35
3 NAND Flash Memory Devices 37
3.1 Introduction, 37
3.2 LOCOS Cell, 40
3.2.1 Conventional LOCOS Cell, 40
3.2.2 Advanced LOCOS Cell, 40
3.2.3 Isolation Technology, 43
3.2.4 Reliability, 46
3.3 Self-Aligned STI Cell (SA-STI Cell) with FG Wing, 48
3.3.1 Structure of SA-STI Cell, 48
3.3.2 Fabrication Process Flow, 50
3.3.3 Characteristics of SA-STI with FG Wing Cell, 53
3.3.4 Characteril3Q